System on Chip Interfaces for Low Power Design
(Sprache: Englisch)
System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The...
lieferbar
versandkostenfrei
Buch (Kartoniert)
92.70 €
- Lastschrift, Kreditkarte, Paypal, Rechnung
- Kostenlose Rücksendung
- Ratenzahlung möglich
Produktdetails
Produktinformationen zu „System on Chip Interfaces for Low Power Design “
Klappentext zu „System on Chip Interfaces for Low Power Design “
System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The book offers a common context to help understand the variety of available interfaces and make sense of technology from different vendors aligned with multiple standards. With particular emphasis on power as a factor, the authors explain how each interface performs in various usage scenarios and discuss their advantages and disadvantages. Readers learn to make educated decisions on what interfaces to use when designing systems and gain insight for innovating new/custom interfaces for a subsystem and their potential impact.
Inhaltsverzeichnis zu „System on Chip Interfaces for Low Power Design “
- SoC Design Fundamentals and Evolution
- Understanding Power Consumption Fundamentals
- Generic SoC Architecture and Components
- Display Interfaces
- Multimedia Interfaces
- Communication Interfaces
- Memory Interfaces
- Security Interfaces
- Power Interfaces
- Sensor Interfaces
- Input Device Interfaces
- Debug Interfaces
Appendix A: USB3.0Appendix B: Industry ConsortiumsAppendix C: Overview of Intel SoC: Baytrail
Autoren-Porträt von Sanjeeb Mishra, Neeraj Kumar Singh, Vijayakrishnan Rousseau
Sanjeeb Mishra is a Validation Architect with Intel. He has 15 years of experience ranging from hardware system design to SOC validation for telecom, consumer electronics, PC and mobility products; and has specific expertise on SoC architecture for mobile devices. Neeraj Kumar Singh is a Platform Architect for tablet platforms at Intel. Prior to this he worked on CPU, Graphics and Chipset validation tools. His areas of expertise are hardware software co-design, SoC system architecture, and system software design and development. Vijayakrishnan Rousseau is a Technical Lead at Intel. He has 15 years of experience in GPU and SOC validation with specialization in Display interfaces like HDMI, Display Port and Emulation.
Bibliographische Angaben
- Autoren: Sanjeeb Mishra , Neeraj Kumar Singh , Vijayakrishnan Rousseau
- 2015, 406 Seiten, Maße: 23,8 x 19,4 cm, Kartoniert (TB), Englisch
- Verlag: Morgan Kaufmann
- ISBN-10: 0128016302
- ISBN-13: 9780128016305
- Erscheinungsdatum: 04.12.2015
Sprache:
Englisch
Kommentar zu "System on Chip Interfaces for Low Power Design"
Schreiben Sie einen Kommentar zu "System on Chip Interfaces for Low Power Design".
Kommentar verfassen