Variation Tolerant On-Chip Interconnects
(Sprache: Englisch)
This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. It is for anyone concerned with the design of next generation, high-performance electronics systems.
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This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. It is for anyone concerned with the design of next generation, high-performance electronics systems.
Inhaltsverzeichnis zu „Variation Tolerant On-Chip Interconnects “
Introduction.- On-Chip Communication.- Interconnect Design Techniques.- Design of Delay-Insensitive Current Sensing Interconnects.- Enhancing Completion Detection Performance.- Energy Efficient Semi-Serial Interconnect.- Comparison of the Designed Interconnects.- Circuit Techniques for PVT Variation Tolerance.
Autoren-Porträt von Ethiopia Enideg Nigussie
Introduction.- Interconnect Design Techniques.- On-Chip Wire Modeling.- Design of Delay-Insensitive Current Sensing Interconnects.- Enhancing Completion Detection Performance.- Energy Efficient Semi-Serial Interconnect.- Comparison of the Designed Interconnects.- Circuit Techniques for PVT Variation Tolerance.
Bibliographische Angaben
- Autor: Ethiopia Enideg Nigussie
- 2014, 2012, 172 Seiten, Maße: 15,5 x 23,5 cm, Kartoniert (TB), Englisch
- Verlag: Springer, Berlin
- ISBN-10: 1489990860
- ISBN-13: 9781489990860
Sprache:
Englisch
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