Metrology and Diagnostic Techniques for Nanoelectronics (PDF)

Zhiyong Ma received his MS degree in materials engineering from Purdue University, Indiana, and a PhD in materials science and engineering from the University of Illinois, Urbana-Champaign. He worked in thin-film metallization and processing at Digital Equipment Corporation and joined Intel's Corporate Quality Network in 1995. Currently, he is vice president of the Technology and Manufacturing Group and director of Technology Development and Manufacturing Labs at Intel, responsible for the CQN lab network in support of silicon and assembly technology development and manufacturing, product fault diagnostics, and silicon and platform benchmarking, including strategic business planning, analytical technique development, and metrology roadmaps. Dr. Ma holds 8 patents in underbump metallization, strained silicon transistors, secured fuse technology, and silicon diagnostic techniques, has published more than 25 refereed papers, and has coauthored a book chapter on silicide technology. His research interests include thin-film kinetics, analytical techniques and metrology, and product fault diagnostics.

David G. Seiler received his PhD and MS in physics from Purdue University and a BS in physics from Case Western Reserve University, Ohio. He is a fellow of the American Physical Society and a fellow of the Institute of Electrical and Electronic Engineers. In 2000, he received a Distinguished Alumni Award from Purdue University's School of Science for his contributions to and achievements in semiconductors. He served as solid state physics program director in the Materials Research Division, National Science Foundation; spent a year's sabbatical at the MIT Francis Bitter National Magnet Laboratory; and was a regents' professor of physics at the University of North Texas. He joined the National Institute of Standards and Technology (NIST) in 1988 and served as program analyst in the program office for the director of NIST and as materials