Understanding Logic Locking

Basics of VLSI Design.- Basics of VLSI Testing and Debug.- IP Protection in VLSI Design: A Historical View.- Making a Case for Logic Locking.- Fundamentals of Logic Locking.- Infrastructure around Logic Locking.- Impact of Satisfiability Solvers on Logic Locking.- Post-Satisfiability Era: Countermeasures and Threats.- Design-for-Testability and its Impact on Logic Locking.- Emergence of Cutting-edge Technologies on Logic Locking.- Logic Locking in Future IC Supply Chain Environments.- Multilayer Approach to Logic Locking.- A Step-by-Step Guide for Protecting/Locking Your IP.- A Step-by-Step Guide for Security Evaluation of Protected/Locked IP.

Kimia Zamiri Azar is a postdoctoral research associate in the Department of Electrical and Computer Engineering at the University of Florida. She received a Ph.D. degree from the Department of Electrical and Computer Engineering at George Mason University in 2021. She also received her M.S. and B.S. from the Department of Electrical and Computer Engineering at Shahid Beheshti University, 2015, and K. N. T. University, 2013, respectively. Her research interests span hardware security and trust, supply chain security, System-on-Chips security validation and verification, and IoT security. She has multiple publications in high-prestigious journals and conferences, including IEEE Transactions on Computers, IEEE Transactions on VLSI, IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES), and Design Automation Conference (DAC), with awards including nominations for Best Paper Award in IEEE Computer Society Annual Symposium on VLSI (ISVLSI)'20 and IEEE/ACM Conference on Computer-Aided-Design (ICCAD)'21.

Hadi Mardani Kamali is a postdoctoral research associate at Florida Institute for Cybersecurity Research (FICS), the Department of Electrical and Computer Engineering at the University of Florida. He received his Ph.D. degree from the Department of Electrical and Computer Engineering at George Mason University, 2021. He received his M.S. and B.S. from the Department of Electrical and Computer Engineering at Sharif University of Technology, 2013, and K. N. T. University, 2011, respectively. His research delves into hardware security with a particular focus on exploiting IP protection techniques, design-for-trust for VLSI circuits, and CAD frameworks for security (design-for-security), in which he has numerous publications in top journals and conferences including IEEE Transactions on Computers, IEEE Transactions on VLSI, IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES), and Design Automation Conference