System Level Design from HW/SW to Memory for Embedded Systems / IFIP Advances in Information and Communication Technology Bd.523 (PDF)
The 18 full revised papers presented were carefully reviewed and selected...
- Lastschrift, Kreditkarte, Paypal, Rechnung
- Kostenloser tolino webreader
This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015.
The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.
- 2018, 1st ed. 2017, 231 Seiten, Englisch
- Herausgegeben: Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg
- Verlag: Springer-Verlag GmbH
- ISBN-10: 3319900234
- ISBN-13: 9783319900230
- Erscheinungsdatum: 16.04.2018
Abhängig von Bildschirmgröße und eingestellter Schriftgröße kann die Seitenzahl auf Ihrem Lesegerät variieren.
- Dateiformat: PDF
- Größe: 15 MB
- Ohne Kopierschutz
- Vorlesefunktion
Schreiben Sie einen Kommentar zu "System Level Design from HW/SW to Memory for Embedded Systems / IFIP Advances in Information and Communication Technology Bd.523".
Kommentar verfassen